In the assignment, you will create combational logic circuit designs on paper and then
simulate the behaviour of the designs using MATLAB/Simulink. The University has a
license for students to use MATLAB and MATLAB is downloadable onto a PC or laptop
by logging into your my.mun.ca account and selecting the “student” tab. (It is not
necessary to install any extra toolboxes or libraries beyond the default installation.)
Before you complete this assignment, you should watch the video called “Introduction to
Simulink” located in the Course Contents under “Simulink Videos”.
Once you have downloaded MATLAB onto your device, you may open MATLAB and
select “Simulink” to begin. Select “Blank Model” to begin the input of your design.
Under the “SIMULATION” tab you will find the “Library Browser” which will give you
access to components to use in your model. (You can also search for components based
on the component name.) Most of the logic components (such as logic gates) can be
found under “Simulink ® Logic and Bit Operations”, as well as “Sinks” and “Sources”.
Under “Simulink Extra ® Flip Flops”, you will find a “Clock” component and “D FlipFlop” component (which will be useful for sequential logic designs later in the course).
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Question 1 (20 marks)
A digital logic system is to be designed to take 4 inputs – W, X, Y, and Z – and set an
output F to 1 when the 4 inputs are the unsigned binary representation of a prime number;
otherwise output F is set to 0. Assume that W represents the most significant bit and Z the
least significant bit. For example, WXYZ = 1101 1110 is decimal 14 and is not prime.
(a) Complete a truth table for the system.
(b) Determine a minimized Boolean function to implement the digital system and draw
the logic circuit to represent the final design. Your design can use any types and
sizes of gates but should be minimized as appropriate. You may wish to use
Karnaugh maps for your minimization.
(c) Create a model of your logic circuit in Simulink. For the output, select the “Scope”
component from “Sinks” and for each input, connect a “Clock” component from
“Simulink Extra ® Flip Flops”. For each “Clock” input, also connect a “Scope”
component.
(d) Adjust the period of the 4 clock inputs to generate all 16 possible inputs over the
simulation period. For example, if the 4 clocks have periods of 2, 4, 8, and 16
seconds, then over a 16 second period, the entire set of possible inputs will occur.
(e) Run the simulation, capturing the “Scope” signals from the 4 inputs and the output.
Examine the scope signals and verify that the circuit has behaved as expected.
Comment on the outcome of the simulation.
(f) From you design in (b), determine and draw a realization of the design which uses
only inverters and NAND gates (of any size). Repeat (c) – (e) for your NANDbased realization. Comment on the outcome of the simulation.
Submit with your assignment, the hand-written portions of your solution and, for the
simulation aspects, submit your circuit diagram from Simulink and the simulation
waveforms from the scopes in the circuit. Be sure that your results are organized and
labelled clearly.
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Question 2 (20 marks)
A digital system takes a 5-bit input, X = [X4 X3 X2 X1 X0], representing an unsigned
binary number N, where X4 represents the most significant bit and X0 represents the least
significant bit. The output of the circuit, F, based on the value of N is given in the table
below.
Note that input ranges for N not listed in the table are not expected to occur and do not
need to be processed by the circuit (i.e., these can be treated as “don’t care” conditions).
(a) Complete a truth table for the system.
(b) Determine a minimized Boolean function to implement the digital system and draw
the logic circuit to represent the final design. Your design can use any types and
sizes of gates but should be minimized as appropriate.
HINT: You can minimize using two 4-bit K-maps and then combine the results
of the two minimizations together.
(c) Create a model of your logic circuit in Simulink. For the output, select the “Scope”
component from “Sinks” and for each input, connect a “Clock” component from
“Simulink Extra ® Flip Flops”. For each “Clock” input, also connect a “Scope”
component.
(d) Adjust the period of the 5 clock inputs to generate all 32 possible inputs over the
simulation period. For example, if the 5 clocks have periods of 2, 4, 8, 16, and 32
seconds, then over a 32 second period, the entire set of possible inputs will occur.
(e) Run the simulation, capturing the “Scope” signals from the 5 inputs and the output.
Examine the scope signals and verify that the circuit has behaved as expected.
Comment on the outcome of the simulation.
Submit with your assignment, the hand-written portions of your solution and, for the
simulation aspects, submit your circuit diagram from Simulink and the simulation
waveforms from the scopes in the circuit. Be sure that your results are organized and
labelled clearly.
N (in decimal) F
0 £ N £ 4 1
5 £ N £ 7 0
10 £ N £ 11 1
12 £ N £ 13 0
15 £ N £ 17 1
18 £ N £ 19 0
20 £ N £ 25 1
26 £ N £ 27 0
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Question 3 (20 marks)
A combinational logic system has four input bits X1, X0, Y1, and Y0, representing two 2-
bit words X1X0 and Y1Y0, with X1 and Y1 being the most significant bits. The output is a
3-bit word, Z2Z1Z0 (with Z2 being MSB), derived by multiplying X1X0 by Y1Y0 and
taking the result of the multiplication modulo 5.
Recall that the “modulo 5” operation is equivalent to determining the remainder when
dividing a number by 5. For example, inputs X1X0 = 10 and Y1Y0 = 11, results in (2´3)
modulo 5 = 6 modulo 5 = 1, which would be represented as Z2Z1Z0 = 001.
(a) Determine the truth tables for Z2, Z1, and Z0.
(b) Design a combinational logic circuit to implement the system. Your design should
include the following: (1) K-maps, (2) minimized expressions for the outputs, and
(3) a minimized logic circuit using gates of any appropriate type and size.
(c) Create a model of your logic circuit in Simulink. For each of the outputs, select the
“Scope” component from “Sinks” and for each input, connect a “Clock”
component from “Simulink Extra ® Flip Flops”. For each “Clock” input, also
connect a “Scope” component.
(d) Adjust the period of the 4 clock inputs to generate all 16 possible inputs over the
simulation period. For example, if the 4 clocks have periods of 2, 4, 8, and 16
seconds, then over a 16 second period, the entire set of possible inputs will occur.
(e) Run the simulation, capturing the “Scope” signals from the 4 inputs and the 3 outputs.
Examine the scope signals and verify that the circuit has behaved as expected.
Comment on the outcome of the simulation.
Submit with your assignment, the hand-written portions of your solution and, for the
simulation aspects, submit your circuit diagram from Simulink and the simulation
waveforms from the scopes in the circuit. Be sure that your results are organized and
labelled clearly.